The DCDM software is written entirely in C, and compiled using ImageCraft’s ICC11 compiler. Complied code is written into a Motorola hex file (*.s19) which can be burned into a 16k EPROM or non-volatile static RAM. The non-volatile RAM was used to emulate an EPROM during software development, and it was programmed using a PC parallel port programmer and the BURN program.
Below is a flowchart of the complete DCDM program.
Two arrays, D_Pos[] and D_Neg[] store digitized data from the analog to digital converter. Another array, called Voltage[] contains the expected values for the sampled data. When the sampled data differs from the expected voltage data an error is flagged and written into an error array. Each physical line corresponds to an index into these arrays. The table below lists the indexes and line names.
In order to accept input from the digitizing routine the D_Pos and D_Neg arrays are two dimensional. Digitizing each line is a two step process that generates two numbers. In the first step, the line is sampled and stored in D_Pos[linename][0] or D_Neg[linename][0]. Next, the bias resistors located on the DCDM are enabled, and the same line is digitized again and stored in D_Pos[linename][1] or D_Neg[linename][1]. For example, D_Neg[37][1] contains the sampled value of TrigD1_Pos with the bias resistor enabled.
There are two types of terminations possible on the DART lines: passive and active terminations. Passive termination consists of a single resistor placed across the differential pair of wires that make up each line. Active termination features this same resistor, but also includes a pullup resistor to +3.3VDC on the positve differential line and a pulldown resistor to ground on the negative differential line.
Each configuration of DART devices on the cables results in a unique combination of terminations on the lines. Any given line may be actively terminated or passively terminated. In some configurations lines can be both actively and passively terminated. These differences in terminations translates into differences in sampled data, which is the reason for the complexity of the Voltage array.
The voltage array is three dimensional and contains the expected values for each line. Format as follows:
Voltage[setup][Linetype][select]
Setup:
Since the expected values for each line vary with the configuration of DART devices present on the cables, the configuration variable (setup) is the first index into the Voltage array. Valid numbers are 0 through 5.
Linetype
Many of the lines have the same expected values, and therefore it would be an inefficient use of memory if each line indexed into the voltage array. For example, all of the positive Data lines have the same expected values, and all of the negative Data lines have the same expected values. In any given configuration, there are three sets of expected values, shown below:
The function FigureOffset() determines this index into the Voltage array if passed the integer representation of the line name as shown in the table in section 4.2. For example, FigureOffset(34) returns 1, and FigureOffset(12) returns 0.
Select
The last index into the Voltage array selects one of four expected values corresponding to the four possible digitized values, as shown in the table below:
To find the expected value for the positive Data[12] line with the bias resistor enabled when the DCDM is testing devices in configuration 1 the call to the Voltage array would look like this:
Voltage[1][0][2]
The function Digitize(bias) is used to sample all 40 pairs of lines and store the results into the D_Pos and D_Neg arrays. The only argument Digitize requires is bias, which controls whether or not the bias resistors located on the DCDM are enabled. Digitize(0) samples all of the lines with the bias resistors disabled, and the sampled data is stored in D_Pos[x][0] and D_Neg[x][0]. Likewise, Digitize(1) samples all of the lines with the bias resistors enabled, and the sampled data is stored in D_Pos[x][1] and D_Neg[x][1]. Currently the sampling is done in two passes, the first pass samples all of the lines with the bias resistor disabled, then the lines are sampled again, with the bias resistors enabled. At this point the D_Pos and D_Neg arrays are completely filled.
DCDM digitizing hardware and analogue multiplexer control is described in section 3.4.
The Digitizing function incorporates a loop that samples 4 lines at a time and writes the one byte value into the D_Pos and D_Neg arrays. At the top of the loop the multiplexer control bits (on PORTA of the HC11) are setup. Next, a write to the HC11 ADC control register causes the HC11 to read four analogue voltages and store them in result registers ADR1 through ADR4. In the final portion of the loop these result registers are copied into elements in D_Pos and D_Neg.
The 8 control lines are sampled separately from the data lines in another loop located in the function Digitize. The structure of this loop is essentially the same as the loop described in the paragraph, one exception are the multiplexer control bits set in PORTA.
The CheckLine(index) function compares the sampled data (in D_Pos and D_Neg) against the expected values (in Voltage) and returns an error code, which is written into the ErrorList[] array. Checking is done on a line by line basis. That is, CheckLine is called with a line given as the argument. The corresponding elements of D_Pos and D_Neg are checked against the expected values in the Voltage array, and a single error code is returned. The error code is an unsigned integer, where each bit represents a unique error code. The format the of the error code is shown below.
Some error codes only pertain to certain line terminations. For example, if a line is passively terminated and one of the lines is open, it is impossible for the DCDM to determine which one is faulty. In that situation bit 10 of the error code is flagged and the error code is returned. Bit 11 is flagged if the sampled data differs from the expected data but does not fit into any one of the error detecting algorithms (see the next section for error checking algorithms).
The function IsFloater returns 1 if the current line is passively terminated, and 0 otherwise. This is needed to distinguish between the two types of termination in the CheckLine routine. A passively terminated line can only be checked for an open line.
Below are two schematics of the terminations, as seen from the DCDM side of the cable.
The voltages on nodes A1, B1, A2, and B2 are sampled and stored in D_Pos and D_Neg arrays as follows:
Where x is an integer between 0 and 39 identifying the line. Rs1 and Rs2 are 1k W resistors located in the repeater or UTN modules.
Below is a table listing all of the possible error conditions. A1 represents the 8 bit sampled value, NA1 represents the corresponding expected value, and TOLERANCE is set to 10 counts. Expressions are ANDED together.
For example, the RBL error flag is set if BOTH of the following conditions are met:
All of the resulting error codes from CheckLine are stored in the ErrorList array. After the checking is completed the DCDM briefly displays the number of errors found on the LCD, and then proceeds to display the individual line errors. The line name is printed on the top line (using function GetLineName), and the error condition(s) are printed (in function DisplayError) on the bottom line of the LCD. The DCDM then waits until the START button is pressed to display the next error. When there are no more errors "DONE" is printed.
When the DCDM encounters an UNDEFINED error type, DisplayError simply prints out the hexadecimal representations of the sampled data A1, B1, A2, and B2 on the bottom line of the LCD. Other error messages are discussed in section 2.3.
The equations shown in section 4.4.1 attempt to model the behavior of the termination network under many different types of failures, and they had to be made general enough to cover the wide range of configurations of devices on the DART cables. This generalizing, when combined with other factors such as the high value of Rs1 and Rs2, the relatively poor resolution of the HC11’s ADC, and the resistor value irregularities, introduces error into the checking routines the DCDM uses.
While the DCDM will detect a majority of the errors in the termination networks, it may not always report the correct diagnosis of the problem. For instance, if the center terminating resistor of is shorted, the DCDM may report any one of the following errors: middle resistor too low, break in positive line, break in negative line, RT too high, RB too high.