Table of Contents

• SVX Data Acquisition System Test Flow
  • Introduction
• SRC Module-Level Tests
• FIB Board Module-level Tests
  • Test A - Data Pattern Check
  • Test B - Pedestal Subtraction
  • Test C - Calculation RAM
  • Path Test A - Command FIFO
  • Path Test B - Log FIFO
  • Path Test C - Address Controller
  • Path Test D - Command Output & Interrupt
  • Path Test E - SVX Initialization internal loopback
• FIB Fanout Module-Level Tests
  • Path A - Internal Loopback
  • Path B - Error Detection
• VRB Module-Level Tests (2/5/97) (From Mark Bowden)
  • processor/logic tests (don't require VME or GSTM)
  • basic access tests
  • Logic application tests (VME)
  • scan tests
  • interrupts
• FIB Subrack-Level Tests
  • Path Test A - Fanout to FIB Command FIFO
  • Test A - Output of Pipeline Through GLINK
  • Path Test B - Static Connection to FIB Transition Module
• VRB Subsystem Tests
  • Logic application tests (GSTM)
  • tests
• FIB Subsystem Tests
  • Path Test A - Port Card Control Cable Tests
  • Path Test B - External Initialization Data Loopback
  • Path Test C - Mask & Polarity Test
  • Path Test D - Calibration Tests

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