MODULE isapal
" History:
" 17-Sep-96 DH Checksum=73AE
" 29-Jan-97 DH Remove RESET from PGRM equation. C=7414

@ALTERNATE;
"         +---\/---+
"     IOW |  1  24 | Vcc                     
"     AEN |  2  23 | /DIP0                    
"   RESET |  3  22 | /DIP1                    
"    ADR9 |  4  21 | /DIP2                    
"    ADR8 |  5  20 | /DIP3                    
"    ADR7 |  6  19 | SEL                     
"    ADR5 |  8  17 | IO16                    
"    ADR4 |  9  16 | /DIP4                    
"    ADR3 | 10  15 | /DIP5                    
"    ADR2 | 11  14 | DAT4                    
"     GND | 12  13 | ADR1                    
"          `------'

/IOW	  pin  1	;" Write Strobe
AEN	  pin  2	;" Indicate DMA access
RESET	  pin  3	;" System Reset (Not used)
ADR9	  pin  4	;" 
ADR8	  pin  5	;" 
ADR7	  pin  6	;" 
ADR6	  pin  7	;" 
ADR5	  pin  8	;" 
ADR4	  pin  9	;" 
ADR3	  pin 10	;" 
ADR2	  pin 11	;" 
ADR1	  pin 13	;" 
DAT4	  pin 14	;" Data bit indicates re-program
/DIP5	  pin 15	;" Dip Switch (Active Low input)
/DIP4	  pin 16	;" 

/DIP3	  pin 20	;" 
/DIP2	  pin 21	;" 
/DIP1	  pin 22	;" 
/DIP0	  pin 23	;" 

/IO16	  pin 17	;" Tells ISA that we're 16-bit
/PGRM	  pin 18	;" Reset and program FPGA
/SEL	  pin 19	;" Address match

equations

SEL = /AEN * (/DIP0 :+: ADR4) * (/DIP1 :+: ADR5)
           * (/DIP2 :+: ADR6) * (/DIP3 :+: ADR7)
           * (/DIP4 :+: ADR8) * (/DIP5 :+: ADR9);

PGRM = SEL * DAT4 * /ADR3 */ADR2 */ADR1 * (IOW+PGRM)
     + PGRM * / (SEL*IOW*/ADR3*/ADR2*/ADR1);

IO16 = 1;
IO16.OE=SEL;

END