From: Bradley Hall [bhall@fnal.gov] Sent: Thursday, June 26, 2003 4:31 PM To: 'swalk@fnal.gov'; 'dcc@fnal.gov'; 'vince@fnal.gov'; 'Alexandre_Toukhtarov'; 'chramowicz@fnal.gov' Cc: 'cardoso@fnal.gov' Subject: Pixel FTB - Double Board Concept In an effort to simplify the electrical requirements of the Pixel Detector Feed-Trough Board, I would like to propose a double feed-through board – one for data and control and one for power and bias (see attached .pdf file). The power and bias FTB can be a “daughter” card to the data and control FTB (although they share no electrical connections). Both boards will have connectors on the side facing away from the center of the detector as in the original as well as the .200” wide slots for flex cable passage. The assembly process would require the power and bias FTB be installed and connections made followed by the data and control FTB. The board edge to board edge spacing would be approximately 1 inch. This can be even smaller if an appropriate low profile power and bias connector can be used. The advantages to using this concept: a) Much smaller signal densities, less layers per board, lower cost boards, etc. b) Data and power are separated until they reach the HDI. This reduces the chance of EMI noise from the data lines to the power lines. c) Using two boards eliminates the problem of bringing the power flex circuit and the data flex circuit together at the FTB end…they now would each have their own boards to terminate to. The mechanical group will have to tell us if this is physically possible or not. I would appreciate any feed-back. Thanks, Brad -----Original Message----- From: Bradley Hall [mailto:bhall@fnal.gov] Sent: Thursday, June 26, 2003 12:19 PM To: 'swalk@fnal.gov'; 'dcc@fnal.gov'; 'vince@fnal.gov'; 'Alexandre_Toukhtarov'; 'chramowicz@fnal.gov' Subject: Pixel FTB - new problem There is a new problem with the BTeV Pixel Feed-Through board (FTB). The layout tool that our department has, OrCAD, has the limitation of being able to handle a maximum of 16 signal layers. My best case approximation for the number of signal layers we will need, however, is 28. Therefore, we cannot use our tool suite to layout the FTB. My best case approximation for the number of signal layers required with connectors oriented for maximum signal routing cross-sectional area is the following: Assumptions 5 mil traces/ 5 mil spacing Dedicated LV Digital and Analog channel for each module w/ separate dedicated GND return 1000V DC max for high voltage Signal Layers 5 Layers for Low Voltage (analog and Digital), .130” wide traces to accommodate <10% voltage drop @ 800mA 5 Layers for Low Voltage return 5 Layer for High Voltage (1000 VDC w/ .120” spacing) 13 Layers for data and control and reference planes for impedance control (this is best case) For a total of 28 signal layers. We can save a some layers (about 7) by “ganging” up two modules (share power, HV), however, we will still be well over the 16 layer limit. Our options are the following: A) Identify a layout tool that can handle at least 28 signal layers. If Fermilab has the tool and a person who knows how to use it, perhaps we can use these local resources. If Fermilab does not, perhaps the job can be outsourced to a company that has the appropriate tool. B) Completely re-design the way signals and power is brought in/out of the pixel vacuum box. Consider breaking the FTB into two boards…one for data/control signals, one for power and high voltage. C) Reduce signal density by reducing number of modules, ganging up control signals, ganging up power and high voltage, or combination of these. -Brad