D0 Trigger Hub and Links

A. System Interconnect

        1.Cabling Diagram
        2. System Block Diagram
        3.Project Schedule
        4. Backplane Pinouts
 

B. Hub Controller Module.

      1.Schematics (Hierarchical)
            a. Ram Buffers
            b. Ram
            c. Clocks And Data Mux (ALTERA symbol)
            d. Front Panel Connectors and ECL - TTL Translation
            e. Backplane Connectors
            f. VME Interface (ALTERA symbol)
            g. Misc (Caps, Holes, etc.)
            h. Serial Link Signals

        2. Programable Logic (ALTERA)
           a. Clock Generation and Data Multiplexing
                1. Clock Generation
                2. Data Multiplexing
                    a. Multiplexer Array
                    b. A Single Multiplexer
            b. VME Interface, Registers, Ram and Sequencer Control
                1. VME Interface
                2. Registers
                3. Ram Control
                4. Sequencer Control
            c. Sequencer Data Latches and Multiplexing

        3. Input / Output Connectors
            a. From/To L1 and L2Frameworks and Master Clock

C. Serial Link Fanout Module.

       1. Serial Link Fanout Fabrication Drawing
      2. Serial Link Fanout Schematics
      3. Serial Link Fanout Front Panel Drawing
      4. Serial Link Fanout Specifications

D. Status Concentrator Module.

        1. Schematics (Hierarchical)
         a. 16-pin Connectors
            b. Altera Logic
            c. Backplane Connectors
            d. Misc
            e. Status Connectors1
            f. Status Connectors2
        2. Programmable Logic (ALTERA)
            a. Address and Register Decoding
                1. Address Logic
                2. Register Array
                    a. Register Logic
            b. Status Register Logic
                1. Status Register All Channel Array
                    a. Status Register Individual Channel Array
                        1. Status Register Bit Array
        3. TSC top, bottom & parts list
         a. Top view
            b. Bottom view
            c. Part list

E. Serial Link Receiver.

Serial Link Receiver Specifications
Serial Link Receiver Schematic
Serial Link Receiver Board Dimensions

F. J3 Backplane.

    1. Schematics (Hierarchical)
            a. Hub Controller Connector
            b. Serial Link Connector
            c. Blank Connector
            d. Misc
     2. Backplane Layout
 

G. Rough Draft Trigger System Spec/User Manual (includes SRTM)

 H. Serial Receiver Test Module (SRTM)

    1. Schematics
        a. Hierarchical Top
        b. Altera & analyzer hookups
        c. Misc
        d. Vme Connectors
        e. Vme Logic

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