FIB Firmware

The FIB contains 17 Altera EPM7192QC160-7 programmable devices. StateCAD software is used to design the logic and generate AHDL. Altera's Max Plus+ II software is used to compile the AHDL, which is output as a JAM (.jam) file. The PLD containing the FIB's VME interface must be programmed first with Altera's Bit/Byte Blaster cable connected to a dedicated JTAG port on the FIB. The remaining 16 PLDs are connected to a second FIB JTAG port and are programmed as a chain. These PLDs can be programmed with the Bit/Byte Blaster cable or through the VME interface with the Svxdaq software.

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