Fiber Interface Board (FIB)

Features
  • Single Width 9U x 400mm VME-P Module. 
  • Slave Interface Supports D32 Single Word Transfers
  • In-situ Re-Programmable Logic with Remote Download Software (software in development) 
  • Provides Synchronous Control of  up to 160 SVX-III ICs(20,480 channels) 
  • High Speed Data Processing (~350 MBytes/sec) of  SVX-III IC data including: 
    • Header insertion
    • Pedestal Subtraction and/or Gain Multiplication
    • End of Record and Fill Character insertion
    • Only 5 Clock Cyle Processing Latency (8 Clock Cycles - Input to Output)
  • 10 Channel (53 MBytes/sec 8-bit) TTL Data Input Port  on Rear Connector
  • 2 Channel (26 MBytes/sec 12-bit) TTL Control Output Port on Rear Connector
  • 4 - 1 Channel (1.5 Gbit/sec 20-bit ) Optical G-Link Transmitter Modules (FTM-8510)
    • 2 1/2 Data Output Ports / G-Link Transmitter

Description

The Fiber Interface Board (FIB) is an application specific module, designed to readout and control the SVX-III ICs which are part of the Collider Detector Facility (CDF) Upgrade. The FIB conforms to the VIPA Standard for a single-width 9U x 400mm module. Refer to the simplified block diagram of the FIB for  the following discussion.

The FIB consists of two major sections, the FIB Command Micro-Sequencer which is responsible for the control of the SVX-III ICs, and the FIB Data Pipeline Processors.  The two sections of the FIB allow each module to control and collect the data from a maximum of 160 SVX-III ICs (20,480 channels).  The FIB receives timing and control from Silicon Readout Controller (SRC) via the Fiber Interface Board - Fanout Module (FIB-FO) and accompanying J3 backplane.  In coming SVX-III data is received and quickly processed and transmitted to the VMEbus Readout Buffer (VRB) modules via 4 - 1.5Gbit/sec optical links.  The transmitter modules are commercially available from Finisar Corp., Mountain View, CA.  The maximimum data processing rate for each FIB is approximately 350MBytes / sec.
 

Additional Technical Information
Block Diagram 
Applications
Detail Picture
Project Schedule
Firmware
 Module Log

Additional Technical Information (PDF Format)
Hardware Specification Schematic  Bill of Materials Assembly Drawing PC Board Fab Front Panel