Detector Emulation Module (DEM-II)
Features
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The SVX III Detector Emulator Module delivers SVX-like data to all 10 pipeline processors of the FIB, plus optional connection to either the copper or optical FIB Transition Module as shown in Figure 1. The user may select various operational features by programming the control bits in the control latch. Having specified the operational characteristics of the Detector Emulator Module, the FIB is then programmed to issue Back-end clocks. The parallel and identical state machines create identical data patterns in all twelve output registers.
Ten of the registers feed directly back into the FIB to exercise all ten pipeline processors. An additional two outputs allow for connection to either a Copper FIB Transition Module or an Optical FIB Transition Module for loopback testing of a single channel of either. The Copper FIB Transition Module is driven directly with a cable. Provision is given for the insertion of a DOIM Transmitter daughter card, identical to the DOIM board used with the BERT. This allows testing of one DOIM link back to the Optical FIB Transition Module.
The Detector Emulator Module responds to Port Card commands driven by the FIB. Commands sent from the FIB to Port Card 'A' are merely recorded by the Detector Emulator Module and played back as the status values of SVX data in response to Back-end clocks. This allows system software to verify that the correct DDR commands have been issued by the FIB prior to readout. Section 4 details which DDR commands are mapped to the status bits as data is generated.
Writes to Port Card 'B' are interpreted by the Detector Emulator Module as configuration commands. Unlike the connection to Port Card 'A', the control interface of the Detector Emulator Module is completely different than that of the Port Card. The most significant function address (C5), plus the control bit C_DATA, are used as a register select pair. With each command write to Port Card 'B', five bits of Detector Emulator Module configuration data are written to one of four configuration registers, allowing a total of 20 Detector Emulator Module configuration bits. These bits are allocated as:
· 4 bits for the Number Of Chips to emulate (NCHIPS), plus 1 bit for an NCHIPS Load Strobe.
· 7 bits for the Number of Words Per Chip (NWORDS)
· 5 bits for Detector Emulator Module Control Functions (VAR_DATA, DATA_TYPE, ID_SEL, NULL_SEL and EN_INHIBIT)
· 3 Spare bits reserved for future use.
Additional Technical Information
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Additional Technical Information (PDF Format)
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