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ILC and Future Programs Quadrant
Electronic Systems Engineering Department

D0 Central Tracker Trigger (CTT) Mixer System Project

 
 

    Project's Documentation

 
Mixer System
Document name
  ESE doc#   
Document description
Revision date
[mm/dd/yy]
   Download   
D0_Mixer_SYS ESE-D0-000401 Main document of the Central Tracker Trigger (CTT) Mixer System. It describe in details the mixer system. 02/28/03 download PDF file (size 2.0 Mbyte) download Microsoft Word file (size 9.4 Mbyte) download zipped Microsoft Word file (6.7 Mbyte) download postscript file (15.2 Mbyte)
D0_Mixer_XLS N.A. Excel spreadsheet with embedded Visual Basic code used for the mixer system design. It contains the mapping of data bits on mixer board LVDS input/output, on backplane interconnections and on FPGAs pins. The embedded code has ben used to generate the part of the FPGA's VHDL code.
 06/25/02
download Microsoft Excel file (5.3 Mbyte) download zipped Microsoft Excel file (1.5 Mbyte)
D0_Mixer_DPR N.A. Description of diagnostic procedures for the mixer system. 03/18/03  download PDF file (size 0.4 Mbyte) download Microsoft Word file (size 2.0 Mbyte) download zipped Microsoft Word file (1.7 Mbyte) download postscript file (4.4 Mbyte)
D0_Mixer_TSTXLS N.A. Excel Spreadsheet with embedded Visual Basic code. Used to test the mixer boards/system in a test subrack. 06/27/02  download Microsoft Excel file (3.5 Mbyte) download zipped Microsoft Excel file (1.0 Mbyte)  
D0_Mixer_HitMachine N.A. Excel spreadsheet with embedded Visual Basic code. It implements a graphical interface which allows to easily visualize the data bits mapping on the input/output links and to generate test vectors for output links FIFOs.
 07/01/03 download Microsoft Excel file (3.4 Mbyte) download zipped Microsoft Excel file (845 Kbyte)
 
Mixer Board Prototype
Document name
  ESE doc#   
Document description
Revision date
[mm/dd/yy]
   Download   
D0_Mixer_PRTSCH ESE-D0-040502 Mixer Board prototype version of Orcad schematics. 04/05/2002 download PDF file (970 Kbyte)
D0_Mixer_PRTDSN N.A. Mixer Board prototype Orcad schematic (DSN and OPJ files). 02/28/2001
download zipped Orcad DSN and OPJ files (759 Kbyte)
D0_Mixer_PRTMAX N.A. Mixer Board prototype Orcad layout (MAX file). 02/28/2001 download zipped Orcad MAX file (1.2 Mbyte)
 
Mixer Board Production
Document name
  ESE doc#   
Document description
Revision date
[mm/dd/yy]
   Download   
D0_Mixer_PRDSCH ESE-D0-031402 Mixer Board production version of Orcad schematics. It includes notes on differences with the mixer board prototype. 03/14/2002 download PDF file (982 Kbyte)
D0_Mixer_PRDDSN N.A. Mixer Board production Orcad schematic (DSN and OPJ files). 03/14/2002
download zipped Orcad DSN and OPJ files (839 Kbyte)
D0_Mixer_PRDMAX N.A. Mixer Board production Orcad layout (MAX file). 03/14/2002 download zipped Orcad MAX file (1.2 Mbyte)
D0_Mixer_BRDBOM N.A. Mixer Board Bill of Materials. 04/09/2002 download Microsoft Excel file (77 Kbyte) download zipped Microsoft Excel file (18 Kbyte)
D0_Mixer_BRDFRP N.A. Mixer Board front panel drawing. 04/09/2002 download PDF file (24 Kbyte)
D0_Mixer_CPFBIN N.A. Compact flash binary and hex files used for the mixer system configuration. FPGA configuration files (binary) and the subrack controller command files (hex). 02/27/2003 download zipped Binary and HEX files (1.4 Mbyte)
D0_Mixer_CFGHEX N.A. FPGA configuration files (hex). They need to be converted to binary format before being used to configure the FPGAs. The same files converted in binary format with the additional configuration command files are available in the document "D0_Mixer_CPFBIN". 02/27/2003 download zipped HEX files (1.6 Mbyte)
D0_Mixer_BCTMCS N.A. MCS file for the Board Controller FPGA's EEPROM. Used to reprogram the board controller EEPROM through the JTAG port. Version#97. 02/21/2003 download zipped MCS file (43 Kbyte)
 
Mixer System Backplane
Document name
  ESE doc#   
Document description
Revision date
[mm/dd/yy]
   Download   
D0_Mixer_BKP ESE-D0-000704 D0 Mixer System Backplane description and power distribution specification.  03/27/2003 download PDF file (2.6 Mbyte) download Microsoft Word file (size 1.3 Mbyte) download zipped Microsoft Word file (1.0 Mbyte)
D0_Mixer_BKPSCH ESE-D0-031502 Mixer Backplane Orcad schematics. 03/15/2002
download PDF file (1.2 Mbyte)
D0_Mixer_BKPBOM N.A. Mixer System Backplane Bill of Materials. 04/09/2002 download Microsoft Excel file (24 Kbyte) download zipped Microsoft Excel file (7 Kbyte)
D0_Mixer_BKPBBR N.A. Mixer System Backplane Busbar drawings. 04/09/2002 download PDF file (42 Kbyte)
D0_Mixer_BKPDSN N.A. Mixer System Backplane Orcad schematic (DSN and OPJ files). 11/08/2000
download zipped Orcad DSN and OPJ files (705 Kbyte)
D0_Mixer_BKPMAX N.A. Mixer System Backplane Orcad Layout (MAX file). 11/08/2000 download zipped Orcad MAX file (390 Kbyte)
 
Miscellaneous
Document name
  ESE doc#   
Document description
Revision date
[mm/dd/yy]
   Download   
FNAL_ESDE N.A. Copy of the document: "Electrical Design Standards for Electronics to be used in Experiment Apparatus at Fermilab", Revision 6.0 April 15th, 1999. 04/15/1999 download PDF file (251 Kbyte)
D0_Mixer_PICS N.A. Pictures of the mixer system.
11/17/2003 download ZIP file (2.6 Mbyte)
D0_Mixer_NSS2002talk N.A. MS PowerPoint presentation for the Nuclear Science Symposium, Norfolk, Virginia, November 10-16 2002.
11/22/2002 download powerpoint file (1.5 Mbyte)
D0_Mixer_NSS2002poster N.A. Poster presentation for the Nuclear Science Symposium, Norfolk, Virginia, November 10-16 2002.
11/22/2002 download pdf file (3.6 Mbyte)
D0_Mixer_NSS2002CR N.A. Manuscript submitted for conference record of the Nuclear Science Symposium, Norfolk, Virginia, November 10-16 2002.
11/25/2002 download pdf file (0.4 Mbyte)
D0_Mixer_NSS2002TNS N.A. Manuscript submitted for IEEE Transactions of Nuclear Science (TNS)
03/18/2003 download pdf file (0.4 Mbyte)
 


 
    Project's Links

 
Web page Notes
FNAL D0 experiment The DØ Experiment consists of a worldwide collaboration of scientists conducting research on the fundamental nature of matter. The experiment is located at the Fermi National Accelerator Laboratory (Fermilab) in Batavia, Illinois,USA. The research is focused on precise studies of interactions of protons and antiprotons at the highest available energies. It involves an intense search for subatomic clues that reveal the character of the building blocks of the universe.
D0 Central Track Trigger The D0 central track trigger (CTT) uses the information from the central fiber tracker (CFT), central preshower (CPS) and forward preshower (FPS) detectors. The CTT contributes in both level 1 and level 2 trigger decisions.
Jamieson Olsen Jamieson designed the Digital Front-End board (DFE), the DFE subrack controller (DFEC), the Datapump board. The DFE boards receive the data re-organized by the mixer system. The DFEC is used as subrack controller for the mixer system. The Datapump board has been extensively used as pattern generator/verification tool for mixer system debugging and testing. Jamieson's Engineering notes page provides very useful information and documentation for the integration of the Mixer System in the Central Tracker Trigger.
Robert Angstadt Bob is a D0 collaboration software engineer. He designed software used in the Mixer System test-stand. This software allows VME access directly into and out of an Microsoft Excel spreadsheet running on a personal computer with a Microsoft operating system (3.x, Win9x, WinNT, Win2000)  via SBS (formerly Bit3) hardware. Information are available on Bob's D0 notes web page .
John Anderson John Anderson designed the Analog Front-End Board. John's Engineering notes provide information on the AFE board and on the D0 CTT system.
Stefan Gruenendahl D0 collaboration's particle physicist.
Fred Borcherding D0 collaboration's particle physicist.
Gerry Blazey D0 collaboration's particle physicist. Gerry meeting notes provided a weekly update on D0 CTT progress until September 2002.

 
 
    Project's People

 
Name Responsibilities
Stefano M. Rapisarda Project leader, system design, VHDL firmware, system commissioning, system documentation.
Neal G.Wilcer System design, electrical schematics, printed circuit boards layouts, test software, system testing and quality control.



    Project's Tasks

 
Task Task Begin date Task End date Task Status
System design January 2000 February 2002 Completed
System backplane schematic August 2000 October 2000 Completed
System backplane layout October 2000 November 2000 Completed
System backplane manufacturing December 2000 January 2001 Completed
Board prototype schematic August 2000 December 2000 Completed
Board prototype layout January 2001 February 2001 Completed
Board prototype test February 2001 August 2001 Completed
Board production manufacturing August 2001 October 2001 Completed
System tests/debugging February 2001 February 2002 Completed
System commissioning  September 2001 February 2002 Completed
System documentation  January 2000 April 2003 Completed
System support September 2001 -- Active

 

 

    Links to Project's Component and Product Manufacturers
 
Web page Notes
Aldec  Aldec Active-HDL software has been used for FPGA design entry and simulation.
Amp  Mixer board components (connectors): CON1, CON2, J1, J2, J3, J4, J5, J6, J7.
Brookdale Electronics  Mixer board component (oscillator): X1.
Compact Flash Association  Technical documentation on CompactFlash memory cards. 
Corel  Corel Draw software has been used for the mixer documentation drawings.
Cypress  Mixer board components (clock buffers): U8, U9, U13, U16.
C&K  Mixer board component (reset switch): S1.
Elmec Technology  Mixer board components (delay lines): U71, U72.
Fairchild  Mixer board component (NAND gates): U30.
Harting  Mixer board components (backplane connectors): P1, P2, P3, P4.
IDT  Mixer board components (Clock buffers, Analog Switch): U4, U7, U14.
Mentor  Mentor Leonardo Spectrum software has been used for FPGA design synthesis.
Linear Technology  Mixer board component (Supply monitor): U20.
Littlefuse  Mixer board components (fuses): F1, F2.
Lumex  Mixer board components (LEDs): D1-D18. 
Micrel  Mixer board component (Voltage regulator): U21.
Motorola  Mixer board components (Transceivers): U27, U29, U34.
National Semiconductors  Mixer board components (Differential line driver and receiver): U15, U17.
Philips  Mixer board component (Zener transient voltage suppressor): D19.
SanDisk  Mixer System component: CompactFlash memory card. 
Texas Instruments  Mixer System components (LVDS SERDES transmitters and receivers, line drivers): U3, U23-U26, U37-U44, U49-U68. 
Xilinx  Mixer System components (FPGAs, configuration EEPROM): U1, U2, U5, U6, U10-U12, U18, U19, U22, U31-U33, U35, U45-U48. 


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Last Modified by SR on December 25, 2006